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Extract mcu TMS320F2806 HEX or BIN file

时间:2017-11-09 16:31:42 click:nums

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TMS320F2806 Features

  • High-Efficiency 32-Bit CPU (TMS320C28x)
    • 90 MHz (11.11-ns Cycle Time)
    • 16 × 16 and 32 × 32 Multiply and Accumulate (MAC) Operations
    • 16 × 16 Dual MAC
    • Harvard Bus Architecture
    • Atomic Operations
    • Fast Interrupt Response and Processing
    • Unified Memory Programming Model
    • Code-Efficient (in C/C++ and Assembly)
  • Floating-Point Unit (FPU)
    • Native Single-Precision Floating-Point Operations
  • Programmable Control Law Accelerator (CLA)
    • 32-Bit Floating-Point Math Accelerator
    • Executes Code Independently of the Main CPU
  • Viterbi, Complex Math, CRC Unit (VCU)
    • Extends C28x Instruction Set to Support Complex Multiply, Viterbi Operations, and Cyclic Redundency Check (CRC)
  • Embedded Memory
    • Up to 256KB of Flash
    • Up to 100KB of RAM
    • 2KB of One-Time Programmable (OTP) ROM
  • 6-Channel Direct Memory Access (DMA)
  • Low Device and System Cost
    • Single 3.3-V Supply
    • No Power Sequencing Requirement
    • Integrated Power-on Reset and Brown-out Reset
    • Low-Power Operating Modes
    • No Analog Support Pin
  • Endianness: Little Endian
  • JTAG Boundary Scan Support
    • IEEE Standard 1149.1-1990 Standard Test Access Port and Boundary Scan Architecture
  • Clocking
    • Two Internal Zero-Pin Oscillators
    • On-Chip Crystal Oscillator/External Clock Input
    • Watchdog Timer Module
    • Missing Clock Detection Circuitry
  • Peripheral Interrupt Expansion (PIE) Block That Supports All Peripheral Interrupts
  • Three 32-Bit CPU Timers
  • Advanced Control Peripherals
  • Up to 8 Enhanced Pulse-Width Modulator (ePWM) Modules
    • 16 PWM Channels Total (8 HRPWM-Capable)
    • Independent 16-Bit Timer in Each Module
  • Three Input Enhanced Capture (eCAP) Modules
  • Up to 4 High-Resolution Capture (HRCAP) Modules
  • Up to 2 Enhanced Quadrature Encoder Pulse (eQEP) Modules
  • 12-Bit Analog-to-Digital Converter (ADC), Dual Sample-and-Hold (S/H)
    • Up to 3.46 MSPS
    • Up to 16 Channels
  • On-Chip Temperature Sensor
  • 128-Bit Security Key and Lock
    • Protects Secure Memory Blocks
    • Prevents Reverse-Engineering of Firmware
  • Serial Port Peripherals
    • Two Serial Communications Interface (SCI) [UART] Modules
    • Two Serial Peripheral Interface (SPI) Modules
    • One Inter-Integrated-Circuit (I2C) Bus
    • One Multichannel Buffered Serial Port (McBSP) Bus
    • One Enhanced Controller Area Network (eCAN)
    • Universal Serial Bus (USB) 2.0
      (see Device Comparison Table for Availability)
      • Full-Speed Device Mode
      • Full-Speed or Low-Speed Host Mode
  • Up to 54 Individually Programmable, Multiplexed General-Purpose Input/Output (GPIO) Pins With Input Filtering
  • Advanced Emulation Features
    • Analysis and Breakpoint Functions
    • Real-Time Debug Through Hardware
  • 2806x Packages
    • 80-Pin PFP and 100-Pin PZP PowerPAD Thermally Enhanced Thin Quad Flatpacks (HTQFPs)
    • 80-Pin PN and 100-Pin PZ Low-Profile Quad Flatpacks (LQFPs)

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